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1 ds8110-00 may 2009 www.richtek.com RT8110 pin configurations (top view) tsot-23-8 ordering information note : richtek pb-free and green products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area, otherwise visit our website for detail. RT8110 package type j8 : tsot-23-8 operating temperature range p : pb free with commercial standard g : green (halogen free with commer- cial standard) compact synchronous buck dc/dc pwm controller general description the RT8110 is a compact fixed-frequency pwm controller with integrated mosfet drivers for single-phase synchronous buck converter. this part features wide input voltage range operation and tiny package. an internal pre- regulator drives an external bjt to provide regulated output voltage from the input voltage to support vcc. therefore, the controller can operate with wide input voltage range. the RT8110 utilizes voltage-mode control with internal compensation to simplify the converter design. an internal 0.8v reference voltage allows low output voltage application. the switching frequency is fixed at 400khz to reduce the external passive component size to save board space. low-side mosfet r ds(on) is used for inductor current sensing. the RT8110 provides under voltage protection, current limit, over current protection and over temperature protection. features z z z z z 8v to 23v wide range operation z z z z z 0.8v internal reference z z z z z internal soft start z z z z z high dc gain voltage mode pwm control z z z z z fixed 400khz switching frequency z z z z z fast transient response z z z z z fully dynamic 0 to 80% duty cycle z z z z z over current protection z z z z z under voltage protection z z z z z over temperature protection z z z z z tiny package tsot-23-8 z z z z z rohs compliant and 100% lead (pb)-free applications z set-top box power supplies z pc subsystem power supplies z cable modems, dsl modems z dsp and core communication processor power supplies z memory power supplies z personal computer peripherals z industrial power supplies z low voltage distributed power supplies boot fb vcc phase gnd lgate drive ugate 5 34 6 8 2 7 free datasheet http:///
2 ds8110-00 may 2009 www.richtek.com RT8110 typical application circuit 7 8 5 3 6 v c c d r i v e f b u g a t e r t 8 1 1 0 l g a t e g n d 4 1 b o o t p h a s e l 1 v i n c b o o t m u m l r1 r3 c 3 8 v t o 2 3 v c i n c o u t 2 c v c c shutdown q 2 r d b o o t r2 figure 1. single input power rail application figure 2. split input power rail application 7 8 5 3 6 v c c d r i v e f b u g a t e r t 8 1 1 0 l g a t e g n d 4 1 b o o t p h a s e l 1 v i n c b o o t m u m l r1 r3 c 3 5 v t o 2 3 v c i n c o u t 2 c v c c shutdown q 1 r x d b o o t r2 5 v free datasheet http:///
3 ds8110-00 may 2009 www.richtek.com RT8110 functional pin description pin no. pin name pin function 1 boot this pin provides power to the high-side mosfet gate driver. use bootstrap circuit to drive the high-side mosfet. 2 drive pre-regulator control pin. connect this pin to the base of external bjt, and connect the collector to v in to obtain a regulated output voltage to support vcc. if vcc is directly supplied, the bjt is not required, and this pin should be pulled high to vcc through a resistor. drive pin can also be used for enable control. pull low this pin to gnd can shutdown the controller. 3 fb inverting input of the error amplifier. this pin is connected to the joint of output voltage divider resistors to set the output voltage. the voltage at this pin is also monitored for under voltage protection. 4 vcc main bias supply of the ic. vcc can be directly supplied or by vin through external bjt driven by drive pin. this pin also provides power for the low-side mosfet gate driver. connect ceramic capacitor to this pin. the voltage at this pin is monitored for power on reset (por). 5 lgate gate drive pin for low-side mosfet. 6 gnd signal and power ground of the ic. all voltage levels are referenced with respect to this pin. 7 ugate gate drive pin for high-side mosfet. 8 phase switching node of the buck converter. this pin is also used to monitor the voltage drop across the low-side mosfet for over current protection. function block diagram soft-start and fault logic gate control logic + - + - vcc r oc i oc 1.5v boot fb vcc phase gnd lgate drive ugate vcc power- on reset por + - 0.5v + - + - + 0.8v ref uvp pwm gm v cc pre-regulator oscillator s1l oc ph_m ss eo free datasheet http:///
4 ds8110-00 may 2009 www.richtek.com RT8110 electrical characteristics (v in = 5v, t a = 25c, unless otherwise specified) absolute maximum ratings (note 1) z supply voltage, v cc ---------------------------------------------------------------------------------------------- 7v z phase -------------------------------------------------------------------------------------------------------------- ? 3v to 24v z boot ---------------------------------------------------------------------------------------------------------------- 30v z input/output voltage ---------------------------------------------------------------------------------------------- 0.3v to 7v z power dissipation, p d @ t a = 25 c tsot-23-8 ----------------------------------------------------------------------------------------------------------- 0.426w z package thermal resistance (note 4) tsot-23-8, ja ----------------------------------------------------------------------------------------------------- 235 c/w z junction temperature --------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ----------------- ------------------------------------------------------ 260 c z storage temperature range ------------------------------------------------------------------------------------ ? 65 c to 150 c z esd susceptibility (note 2) hbm (human body mode) -------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ---------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 3) z supply voltage, v cc ---------------------------------------------------------------------------------------------- 5.3v z junction temperature range ------------------------------------------------------------------------------------ ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------------ ? 40 c to 85 c p ar ameter s ymbol tes t conditions min typ max units vcc supply current nominal supply current i cc ugate, lgate open -- 3 6 ma regulated output voltage vcc 5.1 5.3 5.5 v power-on r eset vcc threshold voltage rising 3.6 3.9 4.2 v vcc threshold hysteresis 0.3 0.5 0.7 v reference reference voltage v ref 0.784 0.8 0.816 v oscillator free running frequency f sw 320 400 480 khz ramp amplitude v osc -- 2.2 -- v error amplifier e/a transconductance gm note 5 -- 0.3 -- ms open loop dc gain a o note 5 60 90 -- db pwm controller gate driver upper drive source r us our ce v boot ? phase = 5v v boot ? v ugate = 1v -- 3 4.5 to be continued free datasheet http:///
5 ds8110-00 may 2009 www.richtek.com RT8110 note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. devices are esd sensitive. handling precaution recommended. note 3. the device is not guaranteed to function outside its operating conditions. note 4. ja is measured in the natural convection at t a = 25 c on a low effective single layer thermal conductivity test board of jedec 51-3 thermal measurement standard. note 5. guarantee by design. parameter symbol test conditions min typ max units upper drive sink r us in k v ugate ? phase = 1v v boot ? phase = 5 v -- 2 3 lower drive source r lsource v cc ? v lgate = 1v -- 4 6 lower drive sink r lsink v lgate = 1v -- 2 4 upper drive source i us our ce v boot ? v uga te = 5v -- 0.72 -- a upper drive sink i us in k v ugate ? phase = 5v -- 0.82 -- a lower drive source i us our ce v vcc ? v lgate = 5v -- 0.65 -- a lower drive sink i us in k v lgate ? gnd = 5v -- 1.18 -- a protection over current threshold v oc sen se pha se pin volta ge ? 230 ? 200 ? 170 mv maximum duty c ycle -- 80 -- % uvp threshold fb falling -- 0.5 0.6 v soft start soft-start interval t ss 1 3 6 ms free datasheet http:///
6 ds8110-00 may 2009 www.richtek.com RT8110 typical operating characteristics single rail , v out = 2.5v, i load = 5a power on time (2ms/div) ugate (20v/div) v cc (5v/div) v in (10v/div) v out (2v/div) v in = 12v single rail , v out = 2.5v, i load = 5a power off time (20ms/div) ugate (20v/div) v cc (5v/div) v in (10v/div) v out (2v/div) v in = 12v power stage v in comes controller v in controller and power stage power sequence time (2ms/div) ugate (20v/div) v cc (5v/div) v in (10v/div) v out (2v/div) dual rail, v in = 12v, v out = 2.5v, i load = 5a under voltage protection lgate (10v/div) ugate (20v/div) fb (500mv/div) time (10ms/div) single rail , pull low fb to trip uvp v in = 12v, v out = 2.5v, i load = 1a over current protection v out (5v/div) time (4ms/div) lgate (5v/div) ugate (20v/div) inductor current (20a/div) single rail v in = 12v, short circuit output terminal during operation, low-side mosfet r ds(on) = 9m short circuit over current protection v cc (5v/div) time (4ms/div) lgate (5v/div) ugate (20v/div) inductor current (20a/div) single rail v in = 12v, short circuit output terminal then power up, low-side mosfet r ds(on) = 9m free datasheet http:///
7 ds8110-00 may 2009 www.richtek.com RT8110 vcc vs. temperature 5.10 5.15 5.20 5.25 5.30 5.35 5.40 5.45 5.50 -50 -25 0 25 50 75 100 125 temperature vcc (v) single rail v in = 12v, no load ( c) reference voltage vs. temperature 0.784 0.788 0.792 0.796 0.800 0.804 0.808 0.812 0.816 -50 -25 0 25 50 75 100 125 temperature reference voltage (v) single rail v in = 12v, no load ( c) switching frequency vs. temperature 320 340 360 380 400 420 440 460 480 -50 -25 0 25 50 75 100 125 temperature switching frequency (khz) single rail v in = 12v, no load ( c) free datasheet http:///
8 ds8110-00 may 2009 www.richtek.com RT8110 applications information the RT8110 is a compact voltage-mode pwm controller with integrated mosfet gate drivers for single-phase synchronous buck converter. it features tiny package and an internal regulator driver, which drives an external bjt to provide regulated output voltage to support vcc from converter input voltage. therefore, RT8110 can operate in wide input range. vcc can also be directly supplied from 5v without using the external bjt. this part provides internal soft start, internal loop compensation and protection functions. internal regulator driver and vcc there are two approaches to supply controller power vcc. for split power rail application, vcc can be directly supplied from 5v. for single power rail application, vcc can be supplied through a regulator from v in . RT8110 provides an internal regulator driver that drives an external bjt to provide regulated voltage to supply vcc from v in . figure 3 shows the configuration of split power rail application. the vcc pin is connected to 5v with a bypass capacitor, and the drive pin is pulled high through resistor for enable control. when q1 is off, the drive pin is pulled high to vcc through resistor rx. the recommended value of r x is 2k . when q1 is on, the voltage at drive pin goes below the shutdown threshold and the controller shuts down. if enable control function is not required, drive pin still need to be pulled high to vcc through r x . figure 3. directly supply vcc from 5v + - ~ 1.5v + - ~ 1.25v drive 90k 30k internal sub-circuit vcc r x shutdown comparator 5v q1 shutdown figure 4 illustrates the configuration of supplying vcc from v hv (v hv can be v in ) through a regulator in single power rail application. bjt q1, r1, c1 and the internal regulator drive circuit comprises the regulator to supply vcc from v hv . q2 is used for enable control. the design equations are shown as follows. yxb hv be x e b y i = i i vvccv i = r i i= 0.5ma i 5ma ? ?? << (1) (2) (3) (4) combine (1) to (4), r can be determined as follows. hv be hv be ee vvccv vvccv r ii 5ma 0.5ma | ?? ?? << ++ (5) where v be is the base to emitter voltage of q1 is the current gain (h fe ) of q1 i e is the emitter current of q1 i y is the sink current of drive pin design example : v hv = 12v, v cc = 5.3v, i e(max) = 30ma, q1 = 2n3904, v be = 0.7v, = 100 when v hv = 8v (12v 5.3v 0.7v) (12v 5.3v 0.7v) r 5.3ma 0.8ma 1.13k r 7.5k select r 5.6k ?? ?? << < < = (6) figure 4. supply vcc from v hv through regulator + - ~ 1.5v + - ~ 1.25v drive 90k 30k internal sub-circuit vcc r shutdown comparator 8v to 23v q2 shutdown i e i b i y i x v hv q1 free datasheet http:///
9 ds8110-00 may 2009 www.richtek.com RT8110 power-up and soft start the power-on-reset (por) function continuously monitors the voltage at the vcc pin. when vcc rises and exceeds the por threshold, the controller initiates its power-up sequence with continuous low-frequency, small-width pulses at ugate (~6khz). these pulses are used for converter power stage input voltage (v in ) detection. if v in is applied, the voltage at phase pin will rise and fall due to these detection pulses. a digital counter and a comparator are used to record the number of times that voltage at phase pin exceeds the internally-defined voltage level (~1.5v). if the voltage at phase pin exceeds and below the internally-defined voltage level for two times, detection pulse stops and v in is recognized to be ready. once v in is ready, soft-start will then initiate after a time delay. otherwise the detection pulse at ugate continues. RT8110 provides soft start function internally. figure 5 shows the pwm comparator and the operational transconductance amplifier (ota). the ota has three inputs: reference voltage v ref , feedback voltage signal fb, and soft start signal ss. during the soft start interval, the feedback voltage signal tracks the ss signal. because ss signal rises from zero in monotone, therefore the pwm duty cycle will increase gradually at start up to prevent large inrush current. when fb voltage reaches v ref , soft start ends and fb will track v ref . the typical soft start time interval is 3ms figure 5. transconductance amplifier and pwm comparator. + - + + v ref ss v out r1 r2 fb gm transconductance error amplifier pwm comparator compensation network + - bootstrap circuit figure 6 shows the bootstrap gate drive circuit supplied from vcc. the bootstrap circuit consists of bootstrap capacitor c boot and blocking diode d boot . the selection of these two components can be done after choosing the high-side mosfet. the bootstrap capacitor must have a voltage rating that is able to withstand twice the maximum gate boot bootstrap q c = v where q gate is the total gate charge of the high-side mosfet, and v bootstrap is the voltage drop allowed on the high-side mosfet gate drive. for example, the total gate charge for mosfet is about 30nc. for an allowed voltage drop of 300mv, the required bootstrap capacitance is 0.1 f. referring to figure 6, the bootstrap diode must be able to block the power stage supply voltage plus any peak ringing voltage at the phase pin when q1 is turned on. therefore, the voltage rating of the bootstrap diode should be at least 1.5 to twice of the power stage supply voltage. since the r ds(on) of mosfet will be higher if the gate-to- source driving voltage is lower, a bootstrap diode with larger forward voltage results in lower gate drive voltage, higher on-resistance and lower efficiency. therefore, the forward voltage of the bootstrap diode should be low. fast recovery diode or schottky diode which has low forward voltage is recommended for the bootstrap diode. figure 6. gate driver and bootstrap circuit phase boot ugate lgate vcc + - vcc regulator pwm comparator c boot v in d boot q1 q2 current limit and over current protection (ocp) RT8110 provides current limit and over current protection. the low-side mosfet on-resistance is used to sense the inductor current. once the high-side mosfet is turned off, the low-side mosfet is turned on when dead time ends. inductor current then flows through the low- side mosfet and build a voltage drop across the drain and source (phase to gnd). this voltage is sensed to monitor the inductor peak current. as shown in figure 7, the over current threshold is supply voltage. the capacitance is determined using the following equation : free datasheet http:///
10 ds8110-00 may 2009 www.richtek.com RT8110 determined internally by the current source i oc and the internal resistor r oc . the current source i oc flows through resistor r oc and builds voltage v oc (=i oc x r oc ) which is referenced to the phase pin. when load current increase and the sensed phase voltage falls below v oc in one switching cycle, controller will treat this as an over current event. each over current event will cause one ugate pwm pulse to be prohibited, but has no influence on lgate signal, it still keep switching. ugate pwm pulse is permitted when over current event does not exist. if over current event does not occur in the next switching cycle, ugate will switching again, or the ugate pulse will still be prohibited. in this way, inductor peak current will be limited. if the load current further increases, either over current protection or under voltage protection will be tripped. the over current protection will be tripped when the over current event occurs for continuously four pwm pulses. when ocp is triggered, both ugate and lgate go low, controller will initiate re-start in hiccup way. for ocp, controller has three times of hiccupped re-start before shutdown. controller will latch off after three times of hiccup. the ocp threshold is determined by the r ds(on) of low- side mosfet. the inductor peak current i peak can be calculated using the following equation. figure 7. over current protection mechanism + - v cc i oc r oc +- i oc x r oc phase v in q1 q2 l + - i l x r ds(on) oc comparator under voltage protection (uvp) after soft start completes, the fb voltage is monitored for uvp. the uvp function has a 10 s time delay and the threshold is typically 0.5v. if fb voltage falls below the threshold, uvp will be tripped, both ugate and lgate go low and then the hiccupped re-start will be initialized. the uvp re-start behavior is different from that of ocp; the controller will always initiate re-start in a hiccupped way. over temperature protection (otp) the RT8110 integrates thermal protection function. the over temperature protection is a latched protection and its threshold is typically 160 c. when otp is triggered, controller shuts down, both high-side and the low-side mosfet are turned off. input capacitor selection the input capacitor not only reduces the noise and voltage ripple on the input, but also reduces the peak current drawn from the power source. the input capacitor must meet the rms current requirement imposed by the switching current defined by the following equation : the input rms current varies with load and input voltage, and has a maximum of half the output current when output voltage is equal to half the input voltage. in addition, ceramic capacitor is recommended for high frequency decoupling because of its low equivalent series resistance and low equivalent inductance. these ceramic capacitors should be placed physically between and close to the drain of high-side mosfet and the source of the low- side mosfet. the voltage rating is another key parameter for the input capacitor. in general, choose the voltage rating with 50% higher than the input voltage for the input capacitor to ensure the operation reliability. output voltage setting the converter output voltage can be set by the external voltage divider resistors. figure 8 shows the connection of the output voltage divider resistors. the controller will oc peak ds(on) v i r ? note that i peak is the inductor peak current, therefore i peak should be set greater than i out(max) + ( i)/2 to prevent false tripping, where i is the output inductor ripple current, and i out(max) is the maximum load current. since mosfet r ds(on) increases with temperature, the controller will trip ocp/current limit earlier at high temperature. to avoid false tripping, considering the highest junction temperature of the mosfet and calculate the ocp threshold to select r ds(on) . out out in out rms in iv(vv) i = v ? free datasheet http:///
11 ds8110-00 may 2009 www.richtek.com RT8110 figure 8. voltage divider resistors + - gm + v ref v out r1 r2 fb transconductance error amplifier if r1 is given and the output voltage is specified, then r2 can be determined using the following equation : feedback compensation and output capacitor selection the RT8110 is a voltage-mode pwm controller with fixed switching frequency, it uses operational transconductance amplifier (ota) with internal compensation network to eliminate external compensation components. the compensation network is used to shape the gain curve to obtain accurate dc regulation, fast load transient response and maintain stability. figure 9 shows the bode plot of the modulation gain, compensation gain and the close loop gain. a stable control loop has a close gain curve with a -20db/decade slope at the crossover frequency and the phase margin is greater than 45 . figure 9. bode plot of loop gain. 0 f lc f esr f z1 gain (db) freq.(log) modulation gain compensation gain close loop gain f z2 f p2 f p1 f c figure 10. simplified diagram for synchronous buck converter with internal compensation network + - gm + v ref r1 r2 transconductance error amplifier + v in r load esr c out dcr l q1 q2 output capacitor c3 output inductor c p 10pf r s 50k c s 4nf pwm generator & mosfet driver r3 optional referring to figure 9, the location of pole and zero of the lc filter and the compensation network can be determined using the following equations. the inductor and the output capacitor create a double pole at f lc : lc out 1 f = 2lc esr out 1 f = 2esrc the equivalent series resistance (esr) of the output capacitor creates a zero at f esr : regulate the output voltage according to the ratio of the voltage divider resistors r1 and r2. ref out ref v r2 = r1 vv ?? ?? ? ?? figure 10 illustrates the simplified synchronous buck converter using ota with internal compensation. the feedback loop consists of zin (r1, r2 and c1), ota and the internal compensation network z fb (r s , c s , c p ). the value of internal compensation component is: r s 50k, c s 4nf, c p 10pf. the internal compensation network introduces a zero at f z1 : the internal compensation network also introduces a pole at f p2 : z1 ss 1 f = 2rc p2 sp s sp 1 f = cc 2r cc ?? ?? + ?? free datasheet http:///
12 ds8110-00 may 2009 www.richtek.com RT8110 in out out full_load in sw in out out full_load in sw vv v 1 l i0.3vf vv v 1 i0.1vf ? < ? < since the internal compensation values are given, the close loop crossover frequency and phase margin can be obtained after inductance and capacitance are determined. external r3 and c3 are used to adjust the crossover frequency and phase margin. the typical design procedure is described as follows. step 1 : collect system parameters such as switching frequency, input voltage, output voltage, output voltage ripple, and full load current. step 2 : determine the output inductance value. the recommended inductor ripple current is between 10% and 30% of the full load output current. the inductance can be calculated using the following equation. ripple ripple(esr) ripple(c) ripple(esr) ripple ripple ripple(c) out sw v = v v v = iesr i v = 8c f + step 3 : determine the output capacitance and the esr. neglecting the equivalent series inductance of the output capacitor, the output capacitance c out can be approximately determined using the following equations. step 4 : calculate the crossover frequency, phase margin and check stability. calculate the frequency of f lc , f esr , f z1 , f z2 , f p1 and f p2 with selected inductance, capacitance and esr. then plot the bode diagram of close loop gain to check crossover frequency and phase margin. in general, the crossover frequency f c is between 1/10 and 1/5 of the switching frequency (40khz to 80khz); and the phase margin should be greater than 45 . the external r3 and c3 introduces a zero at f z2 : the external r3 and c3 introduces a pole at f p1 : () z2 1 f = 2r3r2c3 + () p1 1 f = 2 r3 r1 // r2 c3 + if the bandwidth and phase margin are not within an acceptable range, add r3 and c3 to slightly adjust the crossover frequency and phase margin. if the crossover frequency and phase margin still can't meet the requirement after tuning r3 and c3, re-select the esr and c out (mainly) or inductance value to change the location of f lc and f esr then repeat step 4. note that the output voltage ripple and transient response should still meet the specification after changing esr, c out or l. thermal considerations for continuous operation, do not exceed absolute maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of RT8110, the maximum junction temperature is 125 c and t a is the maximum ambient temperature. the junction to ambient thermal resistance ja is layout dependent. for tsot-23-8 packages, the thermal resistance ja is 235 c/ w on the standard jedec 51-3 single layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c - 25 c) / (235 c/w) = 0.426w for tsot-23-8 package the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for RT8110 package, the figure 3 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. free datasheet http:///
13 ds8110-00 may 2009 www.richtek.com RT8110 figure 3. derating curves for RT8110 package layout guidelines pcb layout plays an important role in converter design. pcb with carefully layout can help to decrease switching noise, have stable operation and better performance. the following guidelines can be used in pcb layout. ` feedback voltage divider resistors, compensation rcs, bootstrap capacitor, bootstrap diode and ceramic capacitors for vin and vcc should be placed close to the controller as possible. ` keep the power loops as short as possible. the current transition from one device to another at high speed causes voltage spikes due to the parasitic components on the circuit board. therefore, all the current switching loops should be kept as short as possible with wide traces to minimize the parasitic components. ` minimize the trace length between the mosfet and the controller. since the drivers are integrated in the controller, the driving path should be short and wide to reduce the parasitic inductance and resistance. ` place the ceramic capacitor physically close to the drain of the high-side fet and source of low-side fet. this can reduce the input voltage ringing at heavy load. ` place the output capacitor physically close to the load. this can minimize the impedance seen by the load, and then improves the transient response. ` the voltage feedback trace should be kept away from the switching node. keep the voltage feedback trace away from the phase node, inductor and mosfets due to these switching node or components are noisy. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) tsot-23-8 single layer pcb free datasheet http:///
14 ds8110-00 may 2009 www.richtek.com RT8110 richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 8f, no. 137, lane 235, paochiao road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)89191466 fax: (8862)89191465 email: marketing@richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. outline dimension tsot-23-8 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.700 1.000 0.028 0.039 a1 0.000 0.100 0.000 0.004 b 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 c 2.591 3.000 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 a a1 b d c h l b e free datasheet http:///

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